Counselling Code : V I T B  
Accredited by NAAC 'A+'(3.51 CGPA) & NBA

Dr.B.V.V.SATYANARAYANA

Professor

Current Position:

Professor, Department of Electronics & Communication Engineering

Education:
Ph.D.   from    KL Deemed to be University,
M.Tech   from    JNTU, Kakinada
B.Tech   from    JNTU, Hyderabad

Contact Me

Professional Achievements

Design and Analysis of Heterojunction Tunneling Transistor (HETT) based Standard 6T SRAM Cell

International Journal of Engineering & Technology (UAE)
Title: Volume No. 7, Special Issue No.3.29, pp no. 8-11, August 2018
International Journal

Low voltage high speed 8T SRAM cell for ultra-low power applications

International Journal of Engineering & Technology (UAE)
Title: Volume No. 7, Special Issue No.3.29, pp no. 70-74, August 2018
International Journal

Analysis of Heterojunction Tunneling Architectures for Ultra-Low Power Applications

PONTE International Journal of Sciences and Research
Title: Volume No. 73, Issue No. 10, pp. 96-107, October 2017
International Journal

Efficient Adaptive Hold Logic Aging-Aware Reliable Multiplier Design using Verilog HDL

International Journal of Computer Applications
Title: 179 , 26 pp. 5-12, 2018
International Journal

Design analysis of GOS-HEFET on lower Subthreshold Swing SOI

Analog Integrated Circuits and Signal Processing
Title: 109(3), 2021, pp. 683–694
International Journal

A Study of an Ultrasensitive Label Free Silicon Nanowire FET Biosensor for Cardiac Troponin I Detection

Silicon
Title: 2021
National Journal

A Novel Teeth Junction Less Gate All Around FET for Improving Electrical Characteristics

Silicon
Title: 2021
International Journal

Device and Circuit Level Design, Characterization and Implementation of Low Power 7T SRAM Cell using Heterojunction Tunneling Transistors with Oxide Overlap

Microprocessors and Microsystems
Title: 77, 2020, 103164
International Journal

Gate oxide overlapped heterojunction tunneling transistor based low power SRAM cell topologies

International Journal of Advanced Science and Technology
Title: 29(3), pp. 4319–4329, 2020
International Journal

Design, implementation and power analysis of low voltage heterojunction tunnel field effect transistor based basic 6T SRAM cell

International Journal of Innovative Technology and Exploring Engineering
Title: 8(11), pp. 2898–2903, 2019
International Journal

Strategic development of low power high speed SRAM array design

International Journal of Engineering and Advanced Technology
Title: 8(6), pp. 4280–4285, 2019
International Journal

Circuit level low power design, implementation and performance evaluation of different SRAM bit cell configurations operating at ultra-low voltage

International Journal of Engineering and Advanced Technology
Title: 8(5), pp. 1387–1391, 2019
International Journal

Low Power Silicon-On-Insulator Heterojunction Tunneling Transistor Architectures Analysis at Device Level

Journal of Advanced Research in Dynamic and Control Systems
Title: 11, pp. 1976-1982, 2019
International Journal

Design and Performance Analysis of Transmission Gate Based 8T SRAM Cell Using Heterojunction Tunnel Transistors (HETTs)

IEEE International Conference on Recent Innovations in Electrical, Electronics & Communication Engineering (ICRIEECE)
Title: pp. 1372-1376, 2018
International Journal

MOBILE TO MOBILE WIRELESS POWER TRANSFER TECHNOLOGY

INTERNATIONAL JOURNAL OF CURRENT RESEARCH
Title: 9, 9, pp. 57020-57023, 2017.
International Journal

Conference
Simulation of Quadrature amplitude modulation system using VHDL

National Conference on Emerging Technologies in Electronics and Communication (NCETEC-2k11)

Conference
FPGA Implementation of Space time Block Codes for Wi-MAX Applications

National Conference on Signal Processing & embedded Systems Applications (COSMOS 2011)

Workshop
Recent Trends in VLSI Design and its Applications

One week faculty development programme conducted by NIT, Warangal at S R K R Engineering College, Bhimavaram

Workshop
Signals and Systems

Two week ISTE workshop conducted by IIT, Kharagpur at Regency Institute of Technology, Yanam

Conference
Location Tracking and Warning System of a Ship using Arduino

Proceedings - 5th International Conference on Computing Methodologies and Communication, ICCMC 2021

Conference
Lower subthreshold swing and improved miller capacitance heterojunction tunneling transistor with overlapping gate

Materials Today: Proceedings