Counselling Code : V I T B  
Accredited by NAAC 'A+'(3.51 CGPA) & NBA

Mr.A.M.V.PATHI

Asst. Prof.

Current Position:

Asst. Prof., Department of Electronics & Communication Engineering

Education:
M.Tech   from    JNTU, Kakinada
B.Tech   from    JNTU, Kakinada

Contact Me

Professional Achievements

Early estimation of delay in Braun Multiplier

IJETT
Title: July-2013
International Journal

FPGA Implementation Of Content Addressable Memory

IJECCE
Title: August-2013
International Journal

A Novel Approach for Fir Filter Design Using Dual-Port Memory Based Multiplier

IJARCCE
Title: November-2013
International Journal

A New Architecture Designed for Implementing Area Efficient Carry-Select Adder

IJERT
Title: Volume 5 Issue 03, pp:176-181,2016
International Journal

Conference
Braun multiplier Design and Time Delay Modelling in HDL Description

ICNEAC

Workshop
Mentor Graphics

svecw

Workshop
DIP & DSP

BVRIT

Workshop
PTSP & SS

BVRIT

Workshop
Assistive Technology Solutions in Minutes

svecw